1 video ics system control servo BU38603 / bu38703 / bu38803 the BU38603, bu38703 and bu38803 are servo controller ics for vcrs. they contain a high-speed, 8-bit cpu and perform the processing required for the drum, capstan, fv and pv completely in software, allowing a large reduction in the number of external components required. they also contain high-performance linear amplifiers, eliminating the need for interface ics. specialized hardware is included for items that require high-speed processing, to allow efficient utilization of the cpu. applications vhs vcrs and camcorders features 1) cpu 499 commands (69 types) memory-mapped i / o minimum command execution time: 250ns (8mhz) 2)rom capacity BU38603: 16384 8 bit bu38703: 24576 8 bit bu38803: 32768 8 bit 3) ram capacity: 512 8bit 4) interrupt pattern generator: 1 watch-dog timer: 1 external interrupts: 1 fg interrupts: 5 internal interrupts: 7 two timers, serial transmission, interrupt, vhsw, ctl interval timer (fixed) / viss * multi-layer interrupts possible. 5) free-running counter: 19 bit 6) pwm output: 12 bit 2 7) pattern generator 17 bits from frc msb used. output internal: 3 bit external (po): 5 bit external (pio): 6 bit 8) programmable pre-scaler cfg: 7 bit ctl: 6 bit 9) head amplifier / chroma rotary generated from pattern generator output. 10) built-in agc. five-bits used to switch the gain control registers for the ctl amplifier. 11) ctl counter: 1 / 30 or 1 / 25 12) data shift pll calculation: 24 bit 13) timer: 8 bit 2 14) synchronous serial input/output: 8 bit 1 15) vh pulse v separeted from composite synchronous snal. pseudo v generated from pattern generator output. superimposed pseudo h synchronized with the composite synchronous signal. 16) viss / vass vass 0 / 1 discrimination viss discrimination threshold: 3 aspect discrimination. d / a ctl switching. 17) standard i / o parallel i / o (pio): 32 bit parallel output (po): 6 bit 18) a / d converter: 8 bits 8 channels can be masked-programmed to be parallel inputs. 19) watch-dog timer setting period: 4 20) linear circuits dfg: amplifier / comparator cfg: amplifier / comparator ctl: differential amplifier / comparator dpg: comparator
2 video ics BU38603 / bu38703 / bu38803 block diagram cpu pwm ptg vh pulse frc vissvass rom / ram pi / o si / o po0-po5 p1-p31 p0 si so sck adc0-adc7 countp pbctl v ref pwm0 pwm1 vhsw ahsw hampsw chrot envin fv csync resetb ctl + dfgin dfgout dpgin cfgin cfgout ctlampout ctl ctlamp (p0) timer data bus interrupts watchdog a / d converter data shift linear time counter head amp, chroma servo mode register cfg, ctl division gain control linear absolute maximum ratings (ta = 25?) parameter limits unit v dd , v dda , v dad v v in v ss ?0.3 ~ v dd + 0.3 v mw c symbol pd tstg 500 * 1 0.3 ~ 7.0 * 2 ?55 ~ + 125 * 1 reduced by 5mw for each increase in ta of 1 c over 25 c. * 2 use with v ss = v ssa = v sad , and v dd = v dda = v dad . applied voltage pin applied voltage power dissipation storage temperature range recommended operating conditions parameter symbol limits unit v dd , v dda , v ddb 4.5 ~ 5.5 v f ck 8 mhz c topr ?25 ~ + 75 power supply voltage clock frequency operating temperature
3 video ics BU38603 / bu38703 / bu38803 pin descriptions 1 vsad 2 adc0 3 adc1 4 adc2 5 adc3 6 adc4 7 adc5 8 adc6 9 adc7 10 vdad 11 dfgout 12 dfgin 13 dpgin 14 cfgin 15 cfgout 16 vssa 17 v ref 18 ctlamp 19 ctlampout 20 ctl 21 ctl + 22 vdda 23 resetb 24 test 25 po5 26 po4 27 p31 28 p30 29 p29 30 p28 31 p27 32 p26 33 p25 34 p24 35 p23 36 p22 37 po3 38 vhsw 39 ahsw 40 hampsw 41 chrot 42 fv 43 v dd 44 pwm0 45 pwm1 46 p21 47 p20 48 p19 49 p18 50 p17 51 p16 52 p15 53 p14 54 p13 55 p12 56 p11 57 p10 58 59 po2 60 po1 61 po0 62 clocko 63 clocki 64 v ss 65 p8 66 p7 67 p6 68 p5 69 p4 70 p3 71 p2 72 p1 73 p0 74 si 75 so 76 sck 77 envin 78 csync 79 countp 80 pbctl p9 pin name function pin name pin no. pin no. function a / d convertor circuit gnd. can be optionally mask ?programmed to be either a / d or parallel inputs. a / d convertor circuit power supply. drum fg amplifier output drum fg amplifier input drum pg comparator input capstan fg amplifier input capstan fg amplifier output linear circuit gnd internal bias and power-on reset pin ctl amplifier ? input ctl amplifier output ctl coil ? connection ctl coil + connection linear circuit power supply power supply reset test mode input (normally gnd) parallel output parallel i / o parallel i / o and pattern generator output chroma rotary switch output pseudo vsync output logic circuit power supply pwm output parallel i / o parallel output for connection of oscillator logic circuit gnd parallel i / o parallel i / o and external interrupt serial i / o data input serial i / o data i / o serial i / o clock i / o envelope detector logic input composite signal logic input ctl counter pulse output ctl logic output parallel output and pattern generator output head amplifier switch output pattern generator ahsw output pattern generator vhsw output
4 video ics BU38603 / bu38703 / bu38803 electrical characteristics (unless otherwise noted, ta = 25?, v dd = 5v and f osc = 8mhz) i dd 12 19 ma fig.1 v h 4.0 4.5 v fig.2 v l 0.5 1.0 v fig.2 i ll 10.0 16.0 ma fig.2 v ih 4.0 v fig.2 v il 1.0 v fig.2 i h 0 1.0 m a fig.2 i l ?1.0 0 m a fig.2 t sh 0.16 m s t ss 0.16 m s t d 0.3 m s i li 10 26 ma fig.1 i ad 0.6 2.0 ma fig.1 e l ?3 0 3 lsb fig.3 v adph 4.0 v fig.3 v adpl 1.0 v fig.3 i adph 0 1.0 m a fig.3 i adpl ?1.0 0 m a fig.3 logic i / o ? serial i / o ? [logic block] [linear block] (linear: pins 11 to 23) [a / d block] operating supply current output high level voltage output low level voltage max. output low level current input high level voltage input low level voltage input high level current input low level current input data hold input data setup output data delay operating supply current operating supply current linearity error input high level voltage input low level voltage input high level current input low level current i = 2ma v in = v dd v in = 0 i = 1ma : 66 to 73pin 66 to 73pin ( a / d : pins 1 to 10 ) no load, when reset i = 2ma: except pins 66 to 73 between clock and data no load when p input selected when p input selected when p input selected, v in = v dd when p input selected, v in = 0 parameter symbol min. typ. max. unit measurement circuit conditions (logic: pins 24 to 80)
5 video ics BU38603 / bu38703 / bu38803 1k 10 22 43 11064 24 a b sw3 v3 itest v2 iclko sw2 b a xtal sw1 c b v1 iclki 1k 11 12 14 15 63 62 test pin sw4 a b c i4 v4 i1in v a c v1out a a a a fig.1 measurement circuits 1k a a a sw1 a b 18 15 14 12 11 1k 10 22 43 idad idda idd 11064 65-75, 77, 78 2-9, 24, 27-36, 46-58 sw5 sw4 62 sw3 a b xtal sw2 a b 63 fig.2
6 video ics BU38603 / bu38703 / bu38803 10 22 43 11064 23 test pin (2-9) sw1 a b c d / a v1 iadin a fig.3 application example a / d dfg dpg cfg vhpulse frc si / o cpu pi / o rom / ram pwm vissvass dfgamp dpg cfgamp reset 8mhz fig.4 head amplifier ?chroma pattern generator pseudo vsync linear time counter timer servo mode watchdog amplifier gain control drum control envin head amplifier sw chroma rotary sw ahsw vhsw cfg. ctl divider ref ctlamp csync ctl coil serial bus control capstan control voltage data shift count pulse interrupt
7 video ics BU38603 / bu38703 / bu38803 electrical characteristic curves logic circuit current: i dd (ma) temperature: ta ( c) ?30 ?10 10 30 50 70 0 2 4 6 8 10 12 14 16 18 20 fig. 5 logic circuit current. ??output voltage: v l (v) temperature: ta ( c) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 ?30 ?10 10 30 50 70 fig. 7 logic ??output voltage. ??output voltage: v h (v) temperature: ta ( c) 4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5 ?30 ?10 10 30 50 70 fig. 6 logic ??output voltage. linear circuit current: i li (ma) temperature: ta ( c) 4 6 8 10 12 14 16 18 20 22 24 26 ?0 ?0 10 30 50 70 fig. 8 linear circuit current. a / d circuit current: i ad (ma) temperature: ta ( c) 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 ?30 ?10 10 30 50 70 fig. 9 a / d circuit current. external dimensions (units: mm) 0.8 0.05 18.0 0.3 14.0 0.2 0.35 0.1 24.0 0.3 20.0 0.2 80 65 1 24 25 40 41 64 2.7 0.1 1.2 0.15 0.1 0.15 qfp80
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